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# 1   2011-02-15 13:37:34 ADC external trigger?

hivmoacchbhgj
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Registered: 2009-03-10
Posts: 7

ADC external trigger?

Can anybody recommend an application note or an example of how to configure TIM1 as a source of regular ADC1/2 trigger events?

The programing guide (RM0008) lists in Table 70 that ADC1 has 6 internally-generated external trigger sources (TIM1_CC1, TM1_CC2, TIM1_CC3, TIM2_CC2, TIM3_TRGO, and TIM4_CC4 events). I can configure ADC1 in external trigger, single-channel, single-shot mode that is correctly triggered by the TIM3_TRGO signal, but I am unable to configure any of the TIM1 CC events.

Somewhat surprisingly, although the TIMx_CCx events are listed as trigger events, there is no mention of these events anywhere else in the programming guide. How these events are generated appears to be completely undocumented (at least in RM0008). Simply trying to configure TIM1 for output compare on CC1 doesn't seem to work.

Any help would be appreciated.

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# 2   2011-02-16 08:17:42 ADC external trigger?

yrt
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From: Grenoble-France
Registered: 2008-06-11
Posts: 520
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Re: ADC external trigger?

As TRGO is generated when the bit TG is set in event register (TIMx_EGR), CCx events are generated when bit CCxG are set in the same register, after configuring the event with the capture/compare mode register x (TIMx_CCMRx), and the capture/compare register x (TIMx_CCRx).
In your case, configure an output compare channel (TIM_CC1, CC2 or CC3).
Take a look at this chaper of the Reference Manual 008 : "13.3.5 Capture/compare channels".
Did you look after examples in the ST libraries examples ?

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# 3   2011-02-16 15:15:00 ADC external trigger?

hivmoacchbhgj
New member
Registered: 2009-03-10
Posts: 7

Re: ADC external trigger?

Thank you for a helpful answer!

> As TRGO is generated when the bit TG is set in event register (TIMx_EGR),

ok

>CCx events are generated when bit CCxG are set in the same register,

This is not generally true. I can toggle the TIM1_EGR CC1G bit in Ride 7. This does not trigger an ADC conversion. Maybe it does when other settings are correctly configured.

> after configuring the event with the capture/compare mode register x (TIMx_CCMRx),
> and the capture/compare register x (TIMx_CCRx).

Ok, but this is not specified in RM0008.

> In your case, configure an output compare channel (TIM_CC1, CC2 or CC3).
> Take a look at this chaper of the Reference Manual 008 :
> "13.3.5 Capture/compare channels".

I have read the timer section carefully. Repeatedly. Section 13.3.5 says nothing at all about CC events. The output compare mode is in section 13.3.9, which states that when a match occurs:

- An output pin is assigned a value (presumably not needed for an internal signal path)
- Sets an interrupt status register flag
- Generates an interrupt, if requested
- Sends a DMA request

No mention of CC trigger events for other peripherals.

> Did you look after examples in the ST libraries examples ?

Thank you! This was a useful suggestion, as I found a relevant code section in one of the
ADC examples. Apparently, it is necessary to configure the Timer in PWM mode,
the OIS1 bit in CR2 must be set to 1 and the OIS1N bit must be zero.
I can now trigger ADC1 with TIM1_CC1 events.

None of this information is in the data sheet or the programming guide.
For evaluating Primer2, documentation by example is ok. For actual application,
I can not use processor features that are not explicitly documented by the manufacturer,
apparently for product liability reasons.

But thank you for the answer. I really do appreciate the feedback.

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